No single test after PCBA assembly catches everything. Public sources say AOI inspects appearance, but in one study 58% to 61% of the defects found by in-circuit test (ICT) were ones AOI could not detect; ICT and flying probe can both find opens, shorts, passive component values and orientation errors, with ICT needing a fixture and testing fast, and flying probe usually needing no fixture cost but testing slowly; functional test confirms the whole board works to specification, but usually misses protection components that do not act in normal operation, and failures often need an experienced person to find the cause. So first list the defects to stop, then choose a combination by volume and how often the design changes, and leave test points at the design stage. This article covers how to combine post-assembly PCBA tests and how to leave test points; test fixture design and building, test program writing and system-level testing are outside its scope. It is divided into 5 stages:

Stage ① List the defects to stop: manufacturing defects, functional problems, protection components, and which test catches each.
Stage ② What each method catches and misses: AOI, ICT, flying probe, functional test.
Stage ③ Choose a combination by volume and change rate: high-volume, stable designs combine differently from low-volume, frequently revised ones.
Stage ④ Leave test points at design: one per net, size and spacing, on one side.
Stage ⑤ Verify and adjust: see which defects escape to the next station, and fill the gap.

This describes the general case; individual cases still need their own assessment.

Figure 1. Five stages: list defects (defects mapped to stations) → know the methods (what each catches and misses) → choose a combination (a test combination table) → leave test points (a testable board) → verify and adjust (a stable test station).

Stage ①: List the defects to stop

Manufacturing defects: manufacturing defect analysis covers most common process defects, possibly including opens, shorts, passive component measurement, and diode and transistor orientation (Source 3); ICT can also find faulty or missing parts (Source 4).
Functional problems: things like oscillation frequency, potentiometer adjustment and power consumption are seen just when the board is powered and running (Source 4).
Components that don’t normally act: protection components do not act in normal operation, so functional test usually cannot catch them failing (Source 4).
Appearance and joints: the visual defects AOI can see, and what it misses (this article’s compilation; where AOI sits is outside this article’s scope).
Put it in a table: for each defect, which station stops it now, and whether it is stopped (this article’s compilation).

How JIAHON can help:

For how to define the problem clearly and rank priorities by risk priority number before adopting equipment, our published article “Should you adopt the equipment? JIAHON completes the evaluation report for you” walks through it using a solder paste inspection machine as the example.

Stage ②: What each method catches and misses

AOI: inspects appearance, catching missing parts, offsets, polarity and shorts; but a large share of defects found by circuit test are invisible to it (Source 1).
ICT (bed-of-nails test): measures parts one by one, first unpowered for shorts and opens, then passives and simple semiconductors, then powered for complex devices; it can automatically point to which part is faulty or missing, with little need for experienced interpretation (Source 4).
Flying probe: fixture cost is usually zero, and it can touch the ends of component pads and uncovered vias; but one board may take several minutes, and the number of probes is limited (Source 3).
Functional test: applies inputs and power and confirms the whole board works to specification; it may need other boards alongside or a dedicated test stand; failures often need an experienced person to find the cause (Source 4).
Some methods mask defects: probes pressing directly on component leads may press an open joint closed so it goes undetected (Source 2).

Figure 2. What each of four methods catches and what to watch for (illustration, based on Sources 1, 3 and 4): visual inspection catches missing parts, offsets, polarity and shorts, but cannot see many electrical defects; bed-of-nails catches opens, shorts, values and orientation, but needs a fixture first that a revision may make obsolete; flying probe catches the same but may take several minutes per board with limited probes; functional test confirms specification, analog and power, but misses protection components and diagnosis often relies on experience.

A paper by an EMS author at an IPC conference (2002) says that of the defects found by circuit test on four products on a high-volume line, 58% to 61% could not be detected by AOI, and without circuit test those defects would reach the customer. Source 3 adds that ICT can make limited analog and digital measurements that flying probe cannot because of its limited probes.

Stage ③: Choose a combination by volume and change rate

High volume, stable design: ICT needs money and time up front for the fixture, but each board tests fast at low unit cost, and with enough volume the fixture cost is rarely a problem (Sources 3, 4).
Low volume, frequent revisions: flying probe usually has zero fixture cost, and a revision just means changing the program; with ICT, moving parts or test points may mean a new fixture (Source 3).
ICT plus functional test: using both is ideal but not always cost-effective; the author’s company leans toward recommending ICT for its short test time and better diagnosis of faulty parts, and in practice offers both and decides with the customer (Source 4).
AOI plus circuit test: AOI after reflow stops visual defects first, and circuit test stops what AOI can’t see; that study was on a high-volume line, and the paper also says it is mostly not worthwhile at low volume (Source 1).
Write the combination in a table: for each defect, which station stops it, and who catches what slips through (this article’s compilation).

Table 2 | Fixtures, time, cost and coverage

Item	What public sources say
Fixture cost	Flying probe usually zero; ICT may approach US$5,000 (Source 3)
Development time	Flying probe usually under a week; ICT fixture and program up to about six weeks (Source 3)
Test time per board	ICT usually under a minute; flying probe may take several minutes (Source 3); a complex PCBA on ICT usually takes just seconds (Source 4)
Unit cost	ICT often under US$1.24 per board; flying probe may be US$62 or more (Source 3)
Design changes	Flying probe changes the program alone; ICT may need a new fixture if parts or test points move (Source 3)
Using both	ICT and functional test ideally together, but not always cost-effective (Source 4)
Coverage and yield	Circuit test coverage 74.6% to 89.7%; the paper’s Table 2 gives circuit test yield improvements of 2.31%, 12.22% and 6.4% (baseline not stated) (Source 1)

Amounts and times are rough figures from the 2019 article’s author, without a cited source, not a rule.

Stage ④: Leave test points at design

One test point per net: ICT needs a test point on every net; where that is impossible, cluster testing is used instead, but programming, test time and cost all rise, and faults are harder to locate (Sources 2, 3).
Size and spacing: test points of about 1.27 mm (0.05 in) are recommended, at least about 0.89 mm (0.035 in) on the bottom and 1.02 mm (0.040 in) on the top; keep centers at least 2.54 mm (0.1 in) apart where possible so standard 100 mil probes can be used; smaller probes can go to 0.050 in, but with higher contact risk (Source 2). Square pads give about 27% more target area than round ones (Source 2).
Clearance from edges and parts: test points at least about 3.2 mm (0.125 in) from the board edge, and at least 2.54 mm (0.100 in) from parts on the probed side (Source 2).
On one side: put test points on one side and parts on the other where possible; probing both sides raises fixture cost and debugging time (Sources 2, 3).
Two points per functional test net: nets used by functional test ideally get two test points each; functional test usually runs faster than ICT and is more sensitive to noise from wiring inside the fixture (Source 2).
Don’t cover test points with solder mask: keep test points and vias clear of solder mask, and spread test points evenly so the board doesn’t bend in the fixture (Source 2).
Tooling holes: two non-plated holes, ideally on opposite corners (Source 2).

Figure 3. How to leave test points (illustration, based on Source 2): one test point per net; enough center spacing, edge clearance and part clearance; on one side; tooling holes on opposite corners; no solder mask over test points; spread evenly so the board doesn’t bend; two points on functional test nets.

Source 3 says ICT needs a test point at least 50 mil (0.05 in) wide on every net, designed into the board. The two sources give different minimum test point sizes (0.035 / 0.040 in vs. 0.05 in); follow your fixture maker’s specification.

Stage ⑤: Verify and adjust

See which defects escape to the next station: for problems found at functional test or by the customer, look back at which station should have stopped them (this article’s compilation).
Check coverage: the share of nets and parts circuit test can reach; what isn’t tested is a risk; circuit test coverage in that study was about 75% to 90% (Source 1).
With AOI stopping defects first, circuit test yield rises: the paper’s Table 2 gives circuit test yield improvements of 2.31%, 12.22% and 6.4% for three products (baseline not stated), and says the improvement depends on where AOI is installed (Source 1).
Revise together: when a design changes parts or test points, change the test program and fixture with it (Source 3).
Before a test method goes live, deliberately create known defects to see whether it catches them, and do not take a result on one part as proof for other parts (this article’s compilation).

Sources and limits

Sources: Source 1: a paper by an EMS author at an IPC conference (2002, a two-year review of one high-volume line). Source 2: an EMS provider’s ICT design-for-testability guide (undated). Source 3: an article by a technical manager at an EMS provider on an industry website (2019; the same company as Source 2). Source 4: an article by a company’s technical director (2018). JIAHON material: our published articles. IPC design-for-testability or test coverage standards were not read.

Limits: Sources 2 and 3 are from the same EMS provider, and Source 4’s author may favor their own company’s approach; amounts, times and sizes belong to those sources. Source 1 is a 2002 paper on equipment that differs from today’s, so this article takes just its conclusion that AOI and circuit test complement each other, with the figures of the time; it studied one high-volume line, and says the approach is mostly not worthwhile at low volume. Source 2’s dimensions are in inches; this article converts them to millimeters while keeping the source’s units; follow your test house’s and fixture maker’s specifications.

This is a general summary, not a restatement of any standard, an endorsement of any maker or service provider, or a promise about your product or process; follow your product specifications, your customer’s test requirements and the relevant standards, and your own validation.

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How to Combine PCBA Tests: What AOI, ICT, Flying Probe and Functional Test Each Catch and Miss, in 5 Stages from Listing Risks and Choosing a Combination to Leaving Test Points