Coplanarity is whether the ends of a component’s leads or solder balls all lie in the same plane. The method preferred in JEDEC specifications first finds the “seating plane” — the plane that supports the part when it rests on a flat surface — and then looks at how far the farthest terminal is from that plane. If the figure exceeds the limit, the raised lead may not touch the solder paste during reflow, causing an open joint or a weak joint.
This article covers the coplanarity of surface mount components (leaded types such as QFP and ball types such as BGA) at room temperature; component warpage at reflow temperature, board bow and twist, and solder joint inspection methods are outside its scope. It starts from the point where, after soldering, a few leads are open or have very thin joints; for how to inspect BGA joints themselves, see our article How to inspect BGA solder joints: X-ray, dye-and-pry and cross-sectioning in 5 stages. Each stage below covers what to do and what public sources say, with how JIAHON can help where relevant; sources, exceptions and notes are at the end.
Stage 1 | Get the terms straight: coplanarity, height difference and warpage
What to do
- First ask which calculation the other party means by “coplanarity”: from the seating plane, from a regression plane, or a simple highest-minus-lowest height difference. The three give different numbers and cannot be compared directly (this article’s summary; Figure 2).
- Distinguish room-temperature measurement from reflow-temperature measurement: room temperature gives coplanarity; component warpage at reflow temperature is covered by a different standard.
- Distinguish a component problem from a board problem: non-coplanar terminals and uneven board pads can both leave some leads not touching the paste; board flatness must be measured separately (this article’s summary).
What public sources say
The official page of JEDEC (the solid state technology association) test method JESD22-B108B (coplanarity test for surface-mount semiconductor devices, issued September 2010, reaffirmed February 2023) says the test measures the deviation of surface-mount semiconductor device terminals (leads or solder balls) from coplanarity at room temperature, for inspection and device characterization; for coplanarity or package warpage at reflow temperature, see JESD22-B112. A technical article by an inspection equipment company in a trade magazine (URL dated May 2007; it discusses bumps, using BGA solder balls as the example) says the JEDEC specification of the time (JESD22-B108A) offered two ways to set the reference plane: with the seating plane, coplanarity is the maximum distance of any terminal tip from the seating plane; with a regression plane, a least-squares fitted plane through all terminal tips is found by minimizing the sum of squared errors and then shifted to the outermost terminal, and coplanarity is the maximum distance from this plane to the terminals — that is, the peak positive deviation minus the peak negative deviation from the fitted plane. It also points out that the way JEDEC specifications define the plane can produce an inappropriate coplanarity value (notes, table 1).
How JIAHON can help
- For the flatness of the board itself, our published article White light structured light thickness and deformation measurement describes non-contact measurement of height differences across whole carriers and boards (the page says the system currently measures at room temperature); it also notes that JEDEC JESD22-B112, which measures high-temperature warpage, applies to IC packages, not boards.
Stage 2 | Which parts to control, and why
What to do
- Start with leaded or balled surface mount parts: fine-pitch, high-lead-count QFP types, and BGA types with many balls and hidden joints.
- Multi-pin parts such as connectors and shield frames have the same problem of terminals not lying in one plane, and can be specified and checked the same way (this article’s summary).
- Relate what you see on the line back to coplanarity: a few open leads, unusually thin or weak joints, shorts between adjacent leads and placement offset may all be related to coplanarity and are worth investigating (this article’s summary).
What public sources say
A semiconductor resource website’s glossary page (no date shown) says coplanarity is the degree to which a set of points lies in the same plane, applied to component leads, BGA solder balls and other contacts; a lead or ball much higher than its neighbors may not touch the pad during soldering, forming an open joint; one that is too low may touch, but the joint may be thin and fail easily; in extreme cases, a lead with severe coplanarity deviation may bend and touch the adjacent lead, causing a short; parts with poor coplanarity may be hard to place accurately in automated placement and end up offset; all of these raise failure rates and may cause failures in service. A US patent (from a laser and inspection equipment company, issued June 2001) says in its background that leads must lie roughly in one plane — a property called lead coplanarity — so that every lead solders to the board, and that a lead too high above the board to solder properly is a defect (notes, table 2).
How JIAHON can help
- To confirm whether joints are open or weak after soldering, for BGA types with hidden joints see How to inspect BGA solder joints, which covers choosing between X-ray, dye-and-pry and cross-sectioning.
Stage 3 | How to set the reference plane, and what to measure with
What to do
- Set the reference plane first: with the seating plane, it is the plane defined by the three terminals that support the part on a flat surface, and these three points must enclose the part’s center of gravity; with a regression plane, it is the plane fitted to all terminal tips (Figure 2).
- Then decide what to measure: the distance from each terminal tip to the reference plane, taking the one with the largest deviation; the report should state which reference plane was used (this article’s summary).
- Tools: for all the leads or balls, use equipment that measures the height of each point, such as laser scanning, coordinate measuring or optical inspection equipment; to see only whether outer leads are lifted, a digital microscope can look from the side (viewing from the side is this article’s summary).
- Measure at room temperature and record the conditions; warpage at reflow temperature must be measured separately with a high-temperature warpage method (this article’s summary).
What public sources say
The inspection equipment company’s article says the seating plane is the plane determined by three terminal tips whose triangle encloses the part’s center of gravity; it also notes that the JEDEC specification’s algorithm sometimes finds a plane that passes through other terminals, which does not match how the part actually rests on a flat surface, so it proposes a step-by-step correction to find the “true seating plane”. The semiconductor resource website says coplanarity is usually measured with dedicated equipment such as laser scanners, coordinate measuring machines or optical inspection equipment, measuring each lead’s or ball’s height relative to a reference plane. The US patent refers to at least three leads enclosing the part’s center of gravity, and divides the measuring methods of its time into two types: methods that produce a 3D surface map from one image, and methods that combine several 2D images (notes, tables 1 and 2).
How JIAHON can help
- 4K 3D digital microscope: the product page lists a built-in measurement system and multi-angle rotating display, used for solder joint inspection, defect identification and detail observation.
- 7-inch digital microscope: the page lists 1–1,200× continuous zoom (another model 1–1,600×), a working distance of 10 mm or more, adjustable lens angle to avoid glare, and photo and video capture for quality records; it can be used to look from the side at whether outer leads are lifted.
Stage 4 | How to agree the limit, and how to check incoming parts
What to do
- The limit comes from the part’s own specification: follow the component data sheet or package drawing, and ask which reference plane it uses; the public sources read for this article give no general limit (this article’s summary).
- Write it into purchasing or approval documents: the limit, the reference plane, the measuring temperature and the sample size (this article’s summary).
- Incoming sampling: measure a few parts from each lot and record the figures; when open joints appear on the line, compare against the incoming records for that lot (this article’s summary).
- Agree the board side too: uneven board pads make the effect of component coplanarity more pronounced, so agree board flatness separately (this article’s summary; source 3 says uneven pad surfaces worsen the problem).
What public sources say
The semiconductor resource website says manufacturers should set and follow strict coplanarity specifications; causes include variation in lead forming, trimming, singulation, ball attach or ball reflow, warpage from differences in the thermal expansion of package materials, and leads bent by improper handling and storage; uneven board pad surfaces make the problem worse. The JEDEC official page says JESD22-B108B is used for inspection and device characterization and can be downloaded free of charge after registering on the JEDEC website (notes, table 2).
How JIAHON can help
- To photograph and record incoming inspections, the 7-inch digital microscope above can be used (the page lists photo and video capture saved as quality records).
Stage 5 | Handling, storage and line use
What to do
- Handling: don’t touch the leads of fine-lead parts; measure dropped parts before using them on the line (this article’s summary; source 3 says improper handling and storage bend leads).
- Packaging: keep the factory packing (tray or tape and reel) until the line; don’t pour parts together into mixed containers (this article’s summary).
- Reworked or hand-soldered parts: leads and balls of removed parts may be deformed; measure coplanarity before deciding to reuse them (this article’s summary).
- When a few leads are open on the line, check in this order: first whether those leads are higher than their neighbors, then the board pads and paste, and only then adjust reflow conditions (this article’s summary).
What public sources say
The semiconductor resource website lists “leads bent by improper handling and storage” as one cause of poorer coplanarity. The US patent says inspection systems that use the top of a seating fixture as the reference plane need special handling devices (such as a mechanism that moves in the height direction), and lists leads too high above the board to solder properly as a defect to be detected (notes, table 2).
How JIAHON can help
- Our published article Tray vs tape and reel: 8 comparisons, and how to load and store BGA and QFP parts compares the two packaging types and covers how BGA and QFP parts are loaded and stored.
Notes: sources and limitations
These notes are for readers who want to check the sources. Where your product specifications, component data sheets or applicable standards differ from this article, follow them.
| Source | Used for | Reference |
|---|---|---|
| 1 | Stages 1, 3, 4: scope of the test method, room temperature, JESD22-B112 for reflow temperature | JEDEC JESD22-B108B official page (standards body page; issued September 2010, reaffirmed February 2023; only the scope statement on the page was read) |
| 2 | Stages 1, 3: the two reference plane calculations (BGA balls as the example), seating plane definition, issues with the JEDEC algorithm (discussing JESD22-B108A of the time) | Inspection equipment company’s technical article in a trade magazine (maker’s material; URL dated May 2007) |
| 3 | Stages 2–5: definition, measuring equipment, causes, effects on soldering | Semiconductor resource website glossary page (no date shown; page metadata updated 18 April 2025) |
| 4 | Stages 2, 3, 5: lead coplanarity, at least three leads enclosing the center of gravity, types of measuring method | US patent (laser and inspection equipment company; issued June 2001; expired) |
| JIAHON | “How JIAHON can help” | JIAHON product pages and published articles |
Standards referred to (follow the current edition from each publisher): JEDEC JESD22-B108B, coplanarity test for surface-mount semiconductor devices (issued September 2010, reaffirmed February 2023; only the official page’s scope statement was read); JEDEC JESD22-B112, package warpage measurement of surface-mount integrated circuits at elevated temperature (mentioned by source 1; not read in full).
Limitations
- Read: the scope statement on the JEDEC JESD22-B108B official page (the full standard was not downloaded; download requires registration), one trade magazine article by an inspection equipment company, one semiconductor resource website glossary page, and one US patent description. For measuring steps and the formal definition of the reference plane, follow the full standard.
- No general limit: none of the public sources read gives a general coplanarity limit; follow the component data sheet or package drawing, and ask which reference plane it uses.
- Positions: source 2’s author works for an inspection equipment company, and the correction it proposes is its own; source 4 is an inspection equipment company’s patent, and its background is the patent’s own summary, not a standard. Only their descriptions of calculations and phenomena are used.
- Seating plane wording: source 2 speaks of the “three high points” of balls and source 4 of “at least three leads” with leads facing down; both describe the three points that support the part on a flat surface, written here as “the three terminals that support the part”.
- This article’s summary: the “highest minus lowest” method and the point that the three figures can’t be compared, distinguishing component from board (stage 1); connectors and shield frames, and relating line symptoms (stage 2); stating the reference plane in reports and viewing outer leads from the side (stage 3); the four items to agree and incoming sampling (stage 4); handling, packaging, rework and troubleshooting order (stage 5). All other statements correspond to the sources. Sources are in English.
- Scope: room-temperature coplanarity of surface mount components only; warpage at reflow temperature (JESD22-B112), board bow and twist, and joint inspection and interpretation are out of scope.
- “How JIAHON can help” uses only text from our product pages and published articles; specifications follow the product pages; link text uses functional names, not model numbers, series codes or makers.
This is a general overview, not a restatement of any standard, and not an endorsement of any maker, equipment builder or service provider, nor an assurance about your product or process. Follow your product specifications, component data sheets and applicable standards, and your own verification; individual cases vary.